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5 v low power eia rs-485 transceiver adm485 rev. f information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?1993C2008 analog devices, inc. all rights reserved. features meets eia rs-485 standard 5 mbps data rate single 5 v supply C7 v to +12 v bus common-mode range high speed, low power bicmos thermal shutdown protection short-circuit protection driver propagation delay: 10 ns typical receiver propagation delay: 15 ns typical high-z outputs with power off superior upgrade for ltc485 applications low power rs-485 systems dte/dce interface packet switching local area networks (lnas) data concentration data multiplexers integrated services digital network (isdn) functional block diagram a gnd b v cc r d ro re de di adm485 00078-001 1 2 3 4 8 7 6 5 figure 1. general description the adm485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. it is designed for balanced data transmission and complies with eia standards rs-485 and rs-422. the part contains a differential line driver and a differential line receiver. both the driver and the receiver can be enabled independently. when disabled, the outputs are three-stated. the adm485 operates from a single 5 v power supply. excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. if during fault conditions, a significant temperature increase is detected in the internal driver circuitry, this feature forces the driver output into a high impedance state. up to 32 transceivers can be connected simultaneously on a bus, but only one driver should be enabled at any time. it is important, therefore, that the remaining disabled drivers do not load the bus. to ensure this, the adm485 driver features high output impedance when disabled and when powered down, which minimizes the loading effect when the transceiver is not being used. the high impedance driver output is maintained over the common-mode voltage range of ?7 v to +12 v. the receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). the adm485 is fabricated on bicmos, an advanced mixed technology process combining low power cmos with fast switching bipolar technology. all inputs and outputs contain protection against esd; all driver outputs feature high source and sink current capability. an epitaxial layer is used to guard against latch-up. the adm485 features extremely fast switching speeds. minimal driver propagation delays permit transmission at data rates up to 5 mbps while low skew minimizes emi interference. the part is fully specified over the commercial and industrial temperature range and is available in 8-lead pdip, 8-lead soic, and small footprint, 8-lead msop packages.
adm485 rev. f | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 timing specifications .................................................................. 4 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 typical performance characteristics ............................................. 7 test circ u its ..................................................................................... 10 switching characteristics .............................................................. 11 applications information .............................................................. 12 differential data transmission ................................................ 12 cable and data rate ................................................................... 12 thermal shutdown .................................................................... 12 propagation delay ...................................................................... 12 receiver open circuit, fail-safe .............................................. 12 outline dimensions ....................................................................... 13 ordering guide .......................................................................... 14 revision history 04/08rev. e to rev. f updated format..................................................................universal changes to table 2............................................................................ 4 updated outline dimension......................................................... 13 changes to ordering guide .......................................................... 14 10/03rev. d to rev. e changes to timing specifications .................................................. 2 updated ordering guide................................................................. 3 7/03rev. c to rev. d changes to absolute maximum ratings ....................................... 3 changes to ordering guide ............................................................ 3 update to outline dimensions....................................................... 9 1/03rev. b to rev. c. change to specifications ..................................................................2 change to ordering guide...............................................................3 12/02rev. a to rev. b. deleted q-8 package ..........................................................universal edits to features.................................................................................1 edits to general description ...........................................................1 edits, additions to specifications.....................................................2 edits, additions to absolute maximum ratings............................3 additions to ordering guide...........................................................3 tpcs updated and reformatted .....................................................5 addition of 8-lead msop package ................................................9 update to outline dimensions........................................................9
adm485 rev. f | page 3 of 16 specifications v cc = 5 v 5%, all specifications t min to t max , unless otherwise noted. table 1. parameter min typ max unit test conditions/comments driver differential output voltage, v od 5.0 v r = , see figure 20 2.0 5.0 v v cc = 5 v, r = 50 (rs-422), see figure 20 1.5 5.0 v r = 27 (rs-485), see figure 20 v od3 1.5 5.0 v v tst = ?7 v to +12 v, see figure 21 |v od | for complementary output states 0.2 v r = 27 or 50 , see figure 20 common-mode output voltage, v oc 3 v r = 27 or 50 , see figure 20 |v od | for complementary output states 0.2 v r = 27 or 50 output short-circuit current, v out = high 35 250 ma ?7 v v o +12 v output short-circuit current, v out = low 35 250 ma ?7 v v o +12 v cmos input logic threshold low, v inl 0.8 v cmos input logic threshold high, v inh 2.0 v logic input current (de, di) 1.0 a receiver differential input threshold voltage, v th ?0.2 +0.2 v ?7 v v cm +12 v input voltage hysteresis, v th 70 mv v cm = 0 v input resistance 12 k ?7 v v cm +12 v input current (a, b) 1 ma v in = 12 v C0.8 ma v in = ?7 v cmos input logic threshold low, v inl 0.8 v cmos input logic threshold high, v inh 2.0 v logic enable input current ( re ) 1 a cmos output voltage low, v ol 0.4 v i out = 4.0 ma cmos output voltage high, v oh 4.0 v i out = ?4.0 ma short-circuit output current 7 85 ma v out = gnd or v cc three-state output leakage current 1.0 a 0.4 v v out 2.4 v power supply current i cc , outputs enabled 1.0 2.2 ma digital inputs = gnd or v cc i cc , outputs disabled 0.6 1 ma digital inputs = gnd or v cc
adm485 rev. f | page 4 of 16 timing specifications v cc = 5 v 5%, all specifications t min to t max , unless otherwise noted. table 2. parameter min typ max unit test conditions/comments driver propagation delay input to output, t plh , t phl 2 10 15 ns r ldiff = 54 , c l1 = c l2 = 100 pf, see figure 22 driver output to output , t skew 1 5 ns r ldiff = 54 , c l1 = c l2 = 100 pf, see figure 22 driver rise/fall time, t r , t f 8 15 ns r ldiff = 54 , c l1 = c l2 = 100 pf, see figure 22 driver enable to output valid 10 25 ns r l = 110 , c l = 50 pf, see figure 23 driver disable timing 10 25 ns r l = 110 , c l = 50 pf, see figure 23 matched enable switching |t zh ? t zl | 0 2 ns r l = 110 , c l = 50 pf, see figure 23 1 matched disable switching |t hz ? t lz | 0 2 ns r l = 110 , c l = 50 pf, see figure 23 1 receiver propagation delay input to output, t plh , t phl 8 15 30 ns c l = 15 pf, see figure 24 skew |t plh ? t phl | 5 ns c l = 15 pf, see figure 24 receiver enable, t zh , t zl 5 20 ns c l = 15 pf, r l = 1 k, see figure 25 receiver disable, t hz , t lz 5 20 ns c l = 15 pf, r l = 1 k, see figure 25 tx pulse width distortion 1 ns rx pulse width distortion 1 ns 1 guaranteed by characterization.
adm485 rev. f | page 5 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. table 3. parameter rating v cc ?0.3 v to +7 v inputs driver input (di) ?0.3 v to v cc + 0.3 v control inputs (de, re ) ?0.3 v to v cc + 0.3 v receiver inputs (a, b) ?9 v to +14 v outputs driver outputs (a, b) ?9 v to +14 v receiver output ?0.5 v to v cc + 0.5 v power dissipation 8-lead msop 900 mw ja , thermal impedance 206c/w power dissipation 8-lead pdip 500 mw ja , thermal impedance 130c/w power dissipation 8-lead soic 450 mw ja , thermal impedance 170c/w operating temperature range commercial range (j version) 0c to 70c industrial range (a version) ?40c to +85c storage temperature range ?65c to +150c lead temperature (soldering, 10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. table 4. transmitting inputs outputs de di b a 1 1 0 1 1 0 1 0 0 x 1 z 2 z 2 1 x = dont care. 2 z = high impedance. table 5. receiving re input a ? input b output ro 0 +0.2 v 1 0 ?0.2 v 0 0 inputs open 1 1 x 1 z 2 1 x = dont care. 2 z = high impedance. esd caution
adm485 rev. f | page 6 of 16 pin configuration and fu nction descriptions adm485 top view (not to scale) ro 1 re 2 de 3 di 4 v cc 8 b 7 a 6 gnd 5 00078-002 figure 2. pin configuration table 6. pin function descriptions pin o. nemonic function 1 ro receiver output. when enabled, if a is greater than b by 200 mv, ro is high. if a is less than b by 200 mv, ro is low. 2 re receiver output enable. a low level enables the receiver output, ro. a high level places it in a high impedance state. 3 de driver output enable. a high level enables the driver differ ential outputs, a and b. a low level places it in a high impedance state. 4 di driver input. when the driver is enabled, a logic low on di forces a low and b high, while a logic high on di forces a high and b low. 5 gnd ground connection, 0 v. 6 a noninverting receiver input a/driver output a. 7 b inverting receiver input b/driver output b. 8 v cc power supply, 5 v 5%.
adm485 rev. f | page 7 of 16 typical performance characteristics receiver output low voltage (v) output current (ma) 50 0 45 30 25 20 15 10 5 0 40 35 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 00078-003 figure 3. output current vs. receiver output low voltage receiver output high voltage (v) output current (ma) 0 3.50 3.75 4.00 4.25 4.50 4.75 5.00 ?2 ?4 ?6 ?8 ?10 ?12 ?14 ?16 ?18 00078-004 figure 4. output current vs. receiver output high voltage temperature (c) receiver output high voltage (v) 4.55 ?50 ?25 0 25 50 75 100 125 i = 8ma 4.50 4.45 4.40 4.35 4.30 4.25 4.20 4.15 0 0078-005 figure 5. receiver output high voltage vs. temperature temperature (c) receiver output low voltage (v) 0.40 0.35 0.15 ?50 0.20 ?25 0 25 50 75 100 125 i = 8ma 0.25 0.30 0 0078-006 figure 6. receiver output low voltage vs. temperature driver differential output voltage (v) 90 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 output current (ma) 0 10 20 30 40 50 60 70 80 0 0078-007 figure 7. output current vs. driv er differential output voltage temperature (c) 2.15 ?50 ?25 0 25 50 75 100 125 driver differential output voltage (v) 1.90 1.95 2.00 2.05 2.10 00078-008 r l = 26.8 ? figure 8. driver differential output voltage vs. temperature
adm485 rev. f | page 8 of 16 driver output low voltage (v) output current (ma) 100 0 04 . 0 4 3.0 3.5 2.0 2.5 1.00.5 1.5 . 5 | t plh ? t phl | temperature (c) receiver skew (ns) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 ?50 ?25 0 25 50 75 100 125 00078-012 90 60 50 30 10 80 70 40 20 00078-009 figure 9. output current vs . driver output low voltage output current ? ma 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 driver output high voltage (v) 00078-010 figure 10. output current vs. driver output high voltage temperature (c) ?50 ?25 0 25 50 75 100 125 supply current (ma) 1.0 0.9 0.7 0.5 driver enabled driver disabled 1.1 0.8 0.6 00078-011 figure 11. supply current vs. temperature figure 12. receiver skew vs. temperature temperature (c) driver skew (ns) 1 0 2 3 4 5 6 | t phla ? t phlb | ?50 ?25 0 25 50 75 100 125 00078-013 | t plha ? t plhb | figure 13. driver skew vs. temperature temperature (c) pwd 1.2 0.8 0.6 0.4 0.2 0 1.0 1.4 ?50 ?25 0 25 50 75 100 125 150 00078-014 | t plh ? t phl | figure 14. driver pulse width distortion (pwd) vs. temperature
adm485 rev. f | page 9 of 16 00078-015 ch1 1.00v ? b w ch2 1.00v ? b w m5.00ns ch3 2.64v a b 1,2 t figure 15. unloaded driver differential outputs 00078-016 ch1 1.00v ? b w ch2 500mv ? b w m5.00ns ch3 2.74v a b 1,2 figure 16. loaded driver differential outputs 00078-017 ch1 1.00v ? b w ch2 1.00v ? b w ch3 5.00v ? b w ch4 2.00v ? b w m10.0ns ch4 400mv di a b ro 1,2 3 t 4 figure 17. driver/receiver propagation delays, low to high 00078-018 ch1 1.00v ? b w ch2 1.00v ? b w ch3 5.00v ? b w ch4 2.00v ? b w m10.00ns ch4 2.76v di a b ro 1,2 3 t 4 figure 18. driver/receiver propagation delays, high to low 0 0078-019 ch1 500mv ? ch2 500mv ? m10.00ns ch4 2.76v a b 1,2 figure 19. driver output at 30 mbps
adm485 rev. f | page 10 of 16 test circuits v od v oc r r 0 0078-020 figure 20. driver voltage measurement v od3 v tst 60? 375 ? 375 ? 00078-021 figure 21. driver voltage measurement r ldiff a b c l1 c l2 00078-022 figure 22. driver propagation delay 0v or 3v de in s2 s1 v out r l v cc c l 00078-023 a b de figure 23. driver enable/disable a v out c l 00078-024 b re figure 24. receiver propagation delay s2 s1 v cc 00078-025 c l v out re re in + 1.5 v ? 1.5 v r l figure 25. receiver enable/disable
adm485 rev. f | page 11 of 16 switching characteristics 3 v 0v b a 0v ?v o +v o 90% point 10% point t r t skew = t plh ? t phl 1/2v o t plh t phl 1.5v 1.5v 90% point 10% point t f v o 00078-026 figure 26. driver propagation delay, rise/fall timing de a , b a , b 1.5v 2.3v 2.3v t zh t zl 1.5v 3 v 0v v ol v oh 0v v ol + 0.5v v oh ? 0.5v t hz t lz 00078-027 figure 27. driver enable/disable timing a, b ro 0v t plh 1.5v 0v t phl 1.5v v oh v ol t skew = t plh ? t phl 00078-028 figure 28. receiver propagation delay re ro ro 1.5v 1.5v 1.5v t zh t zl 1.5v 3 v 0v v ol v oh v ol + 0.5v v oh ? 0.5v t hz t lz output low output high 0v 00078-029 figure 29. receiver enable/disable timing
adm485 rev. f | page 12 of 16 applications information differential data transmission differential data transmission is used to reliably transmit data at high rates over long distances and through noisy environments. differential transmission nullifies the effects of ground shifts and noise signals that appear as common-mode voltages on the line. there are two main standards approved by the eia that specify the electrical characteristics of transceivers used in differential data transmission. the rs-422 standard specifies data rates up to 10 mbaud and line lengths up to 4000 ft. a single driver can drive a transmission line with up to 10 receivers. to cater to true multipoint communications, the rs-485 standard was defined. this standard meets or exceeds all the requirements of rs-422 but also allows for up to 32 drivers and 32 receivers to be connected to a single bus. an extended common- mode range of ?7 v to +12 v is defined. the most significant difference between the rs-422 standard and the rs-485 standard is the fact that the drivers can be disabled, thereby allowing more than one (32 in fact) to be connected to a single line. only one driver should be enabled at a time, but the rs-485 standard contains additional specifications to guarantee device safety in the event of line contention. table 7. comparison of rs-422 and rs-485 interface standards specification rs-422 rs-485 transmission type differential differential maximum cable length 4000 ft. 4000 ft. minimum driver output voltage 2 v 1.5 v driver load impedance 100 54 receiver input resistance 4 k min 12 k min receiver input sensitivity 200 mv 200 mv receiver input voltage range ?7 v to +7 v ?7 v to +12 v no. of drivers/receivers per line 1/10 32/32 cable and data rate the transmission line of choice for rs-485 communications is a twisted pair. twisted pair cable tends to cancel common-mode noise and causes cancellation of the magnetic fields generated by the current flowing through each wire, thereby reducing the effective inductance of the pair. the adm485 is designed for bidirectional data communications on multipoint transmission lines. a typical application showing a multipoint transmission network is illustrated in figure 30 . an rs-485 transmission line can have as many as 32 transceivers on the bus. only one driver can transmit at a particular time, but multiple receivers can be enabled simultaneously. rt rt d r dd r r d r 0 0078-030 figure 30. typical rs-485 network as with any transmission line, it is important that reflections be minimized. this can be achieved by terminating the extreme ends of the line using resistors equal to the characteristic impedance of the line. stub lengths of the main line should also be kept as short as possible. a properly terminated transmission line appears purely resistive to the driver. thermal shutdown the adm485 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. shorting the driver outputs to a low impedance source can result in high driver currents. the thermal sensing circuitry detects the increase in die temperature and disables the driver outputs. the thermal sensing circuitry is designed to disable the driver outputs when a die temperature of 150c is reached. as the device cools, the drivers are re-enabled at 140c. propagation delay the adm485 features very low propagation delay, ensuring maximum baud rate operation. the driver is well balanced, ensuring distortion free transmission. another important specification is a measure of the skew between the complementary outputs. excessive skew impairs the noise immunity of the system and increases the amount of electromagnetic interference (emi). receiver open circuit, fail-safe the receiver input includes a fail-safe feature that guarantees a logic high on the receiver when the inputs are open circuit or floating.
adm485 rev. f | page 13 of 16 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 31. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 32. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters
adm485 rev. f | page 14 of 16 compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 33. 8-lead plastic dual in-line package [pdip] narrow body (n-8) dimensions shown in inches and (millimeters) ordering guide model temperature range package desc ription package option branding adm485an ?40c to +85c 8-lead pdip n-8 adm485anz 1 ?40c to +85c 8-lead pdip n-8 adm485ar ?40c to +85c 8-lead soic_n r-8 adm485ar-reel ?40c to +85c 8-lead soic_n r-8 ADM485ARZ 1 ?40c to +85c 8-lead soic_n r-8 ADM485ARZ-reel 1 ?40c to +85c 8-lead soic_n r-8 adm485arm ?40c to +85c 8-lead msop rm-8 m41 adm485arm-reel ?40c to +85c 8-lead msop rm-8 m41 adm485arm-reel7 ?40c to +85c 8-lead msop rm-8 m41 adm485armz 1 ?40c to +85c 8-lead msop rm-8 m41# adm485armz-reel 1 ?40c to +85c 8-lead msop rm-8 m41# adm485armz-reel7 1 ?40c to +85c 8-lead msop rm-8 m41# adm485jn 0c to 70c 8-lead pdip n-8 adm485jnz 1 0c to 70c 8-lead pdip n-8 adm485jr 0c to 70c 8-lead soic_n r-8 adm485jr-reel 0c to 70c 8-lead soic_n r-8 adm485jr-reel7 0c to 70c 8-lead soic_n r-8 adm485jrz 1 0c to 70c 8-lead soic_n r-8 adm485jrz-reel 1 0c to 70c 8-lead soic_n r-8 adm485jrz-reel7 1 0c to 70c 8-lead soic_n r-8 1 z = rohs compliant part, # denotes rohs co mpliant product may be top or bottom marked.
adm485 rev. f | page 15 of 16 notes
adm485 rev. f | page 16 of 16 notes ?1993C2008 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d00078-0-4/08(f)

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